1. Field of the Invention
The present invention relates to a time synchronization method in a data transmission system and particularly to a time synchronization method to synchronize times of clocks respectively provided at both master station and distant slave station or stations which are transmitted bidirectional data transmissions, by means of the data transmission line and/or lines.
2. Description of the Prior Art
Necessity for accurate record and analysis of operation times and procedures of respective units such as protection apparatus, for example, of electrical power generating facilities, power transmission facilitites or power substation facilities of various electrical stations located in a broad region becomes increasingly apparent with sophisticated operations of electrical power systems in recent years.
In addition, it is also necessary to synchronize the timing for sample-holding of the metering data in the slave station located in different points on the occasion of collecting the metering data at each electrical station to the master station through the data transmission line. Therefore, assumed here as a data transmission system, for example, is the method that the bidirectional data transmission is carried out between the master station and each slave station using the polling/selecting system, a clock circuit is respectively provided to the master station and each slave station of the transmission system, the operation data of various units such as said protection apparatus is transmitted with the code of time of such clock circuits, data is measured simultaneously in each slave station at the predetermined time, and such measured data is once stored in the associated memory, etc. and then transmitted to the master station through the transmission line. The polling/selecting system employed here means the centralized control by the master station (generally a computer) provided as the control station for establishment of data link. For example, this system is employed, in such a case that flow of data is controlled by the control station like the multipoint-type system. In case of this system, the master station transmits the polling code including slave station address in accordance with a predetermined format in order to urge the slave station (normally, a terminal) as the mate station for calling to send data. Moreover, in case of sending data from the master station, the master station issues a selecting code including slave station address to each slave station to make preparation for reception.
In the time synchronization as described above, it is important that the clock circuits of the master and slave stations are synchronized within a range of error that does result not in a problem for practical use. However, since the time required for data transmission has come to exceed by far the time within the allowable error range, particular measures have been required for the method of synchronization. As an example, there is a "remote supervisory control apparatus" described in Japanese Laid-open Patent No. 57-69496 applied to the Patent Office in Japan by MITSUBISHI DENKI KABUSHIKI KAISHA (Mitsubishi Electric Co., Ltd.), and laid open on Apr. 28, 1982.
FIG. 1 is a block diagram illustrating the outline of structure of the conventional data transmission system disclosed in the above patent entitled "remote supervisory control apparatus". For example, in this figure, the data transmission system consisting of Supervisory Control And Data Acquisition (hereinafter, abbreviated as SCADA) system comprises a master station 1 as the control station, slave stations 2, 3, . . . as the mate stations of such master station and data transmission path 5 connecting the master station 1 and slave stations 2, 3, . . . . The master station 1 comprises a central processing unit (CPU) 10, a display panel 11 which displays conditions of the slave stations 2, 3, . . . , a control desk 12 which sends a control command to the slave stations 2, 3, . . . , a typewriter 13 which records operations of this data transmission system and data sent from slave stations 2, 3, . . . , an output circuit 14 provided between an internal bus 51 connected to the CPU 10 and the display panel 11, an input circuit 15 connected respectively to the internal bus 51 and the control desk 12, a typewriter control circuit 16 connected respectively to the internal bus 51 and the typewriter 13, a master clock 17 which is connected to the internal bus 51, a code sending and receiving circuit 18 which is connected to the internal bus 51, and a modem circuit 19 which forms the data transmission path 5 and is provided between external bus 5A which connects the master station 1 and slave station 2 and said code sending and receiving circuit 18.
Meanwhile, the slave station 2 or 3 comprises a CPU 20 or 30 which performs processings such as transmission and reception of data with an electrical station to which a slave station is provided and with the master station, an internal bus 52 or 53 connected to the CPU 20 or 30, an output circuit 24 or 34 which is connected to such internal bus 52 or 53 and provides a measuring command, etc. to an electrical station, etc. to which a slave station is provided, an input circuit 25 or 35 which is connected to the internal bus 52 or 53 and inputs measured data, etc. of the electrical station, etc., a slave clock 27 or 37 which is connected to the internal bus 52 or 53, a code sending and receiving circuit 28 or 38 which is connected to the internal bus 52 or 53, and a modem circuit 29 or 39 which is provided between such code sending and receiving circuit 28 or 38 and the external lines 5A and 5B or 5B and 5C which form said data transmission path 5.
Operations of the data transmission system based on such structure will now be explained. FIG. 2 illustrates a time chart of codes transmittedand received between the master station 1 and the slave stations 2, 3, . . . . The code transmitted by the master station 1 is illustrated at the uppermost part and the codes transmitted by the slave stations 2 and 3 are also illustrated respectively at the intermediate and lower portions. In the sending code of the data transmission system, there is the polling signal S1 which is sequentially transmitted from the sending and receiving circuit 18 of the master station 1 to the slave station 2 or 3. This polling signal S1 reaches the slave station 2 after a transmission delay time .tau..sub.1 and the slave station 3 after a transmission delay time .tau..sub.2, through the modem circuit 19 and data transmission path 5.
On the other hand, at each slave station 2 or 3 the, status of contacts to be watched such as the auxiliary contacts, for example, of protection relay or circuit breaker, etc. is input to the input circuit 25 or 35, and status change of the contacts may be detected by the CPU 20 or 30 through the periodical scanning for the input circuit 25 or 35. If such status change is detected, such input address number and novel state are stored within the memories (not illustrated) of respective slave stations 2 or 3 with the time data of such status change read by the slave clock 27 or 37. If it is assumed here that the polling signal S1 is destined; for example, to the slave station 2, CPU 20 returns the content of status change stored in the memory (not illustrated) and the detection time of such status change (on message stating that there is no status change if status change is not detected to the master station 1 as the return code S2. This return code S2 is transmitted from the code sending and receiving circuit 28 after a constant time t.sub.P from completion of reception of the polling signal S1 and is then transmitted to the master station 1 through the modem circuit 29 and external bus 5A. As illustrated in FIG. 2, the return code S2 from the slave station 2 reaches the code sending and receiving circuit 18 of master station 1 after a transmission delay time .tau..sub.1, while the return code S2 from the slave station 3 reaches said circuit 18 after the transmission delay time .tau..sub.2.
Operations in the master station 1 will now be explained. Upon reception of the return code S2 from the slave station 2 or 3 through the code sending and receiving circuit 18, CPU 10 updates stored contents of a memory (not illustrated) within the master station 1. Moreover, CPU 10 renews the display on the display panel 11 through the output circuit 14 and then records status changes of the slave station 2 or 3 by operating the typewriter 13 through the typewriter control circuit 16.
CPU 10 of the master station 1 encodes the address and the state to be controlled (for example, ON/OFF status of switch) of the facilities in an electrical station, for example, to which a relevant slave station, for example, like the slave station 2 is provided, on the basis of on input from the control desk 12 through the input circuit 15 and then outputs this code to the code sending and receiving circuit 18. This code sending and receiving circuit 18 receives the information from CPU 10 and sends a selection/control code S3 to the corresponding slave station, for example, the first slave station 2 in place of the polling signal. At the slave station, the code sending and receiving circuit 28 or 38 receives this selection/control code S3 and in case the first slave station 2, for example, is selected, the code sending and receiving circuit 28 of such slave station 2 receives such selection/control code S3 and gives a control command to the facilities, for example, of an electrical station to which said first slave station 2 is provided through the output circuit 24. When the relevant facilities respond to this command, the code sending and receiving circuit 28 sends the code as an answer code S4 as in the case of the return code S2 based on said status change. In this case, transmission is carried out, as is obvious from FIG. 2, by the code sending and receiving circuit 28 after a constant time t.sub.P from reception of the selection/control code S3 and thereby the code S4 is transmitted to the master station 1 through the modem circuit 29 and external bus 5A.
Explanation and illustration for the third and the succeeding slave stations are omitted but structure and operation of these slave stations are exactly the same as those of the first and second slave stations 2 and 3 described previously.
In case of analyzing conditions of the system considered as the object of supervisory control based on the data collected through such ordinary remote supervisory control operations, the time information sent from the slave station 2 or 3 must be accurate and accordingly, the time setting is carried out periodically (for example, once at twelve o'clock midnight in every day) to the slave clocks 27, 37 of slave stations 2, 3 for time synchronization to the master clock 17.
Namely, CPU 10 of the master station 1 transmits the time setting code S5, encoded time T.sub.0 to be set (for example, 24 o'clock 00 minute 00 second 000 millisecond), to each slave station 2, 3, . . . through the modem circuit 19 and data transmission path 5 from the code sending and receiving circuit 18 when the preset time approaches. The slave stations 2, 3, . . . having received such time setting code S5 with the code sending and receiving circuits 28, 38 store the time to be set in the memory of CPUs 20, 30 as the preparation for input of a setting command signal S6. CPU 10 of the master station 1 supervises the time of master clock T.sub.0 and transmits the setting command signal S6 from the code sending and receiving circuit 18 to the slave stations 2, 3, . . . through the modem circuit 19 and external buses 5A, 5B . . . of data transmission path 5 when the time of master clock reaches the preset time T.sub.0. The setting command signal S6 reaches the slave station 2 after the transmission delay time .tau..sub.1 from the preset time T.sub.0 and to the slave station 3 after the transmission delay time .tau..sub.2. When this setting command signal S6 reaches the slave stations, CPU 20 of the slave station 2 sets the time of slave clock 27 to T.sub.0 +.tau..sub. 1, while CPU 30 of the slave station 3 sets the time of slave clock 37 to T.sub.0 +.tau..sub.2. Here, the slave stations 2, 3, . . . measure the transmission delay times .tau..sub.1, .tau..sub.2, . . . and store such delay times to the memory of CPUs 20, 30, . . . and then add to the designated setting time T.sub.0 by the time setting code S5.
Upon completion of processing for time setting, CPU returns again to the remote supervisory control operation by sending the polling signal S1.
Since the conventional time synchronization method of the prior art is thus constituted, it accordingly results in the problem that the time synchronization is carried out on a real time basis, operations do not have allowance, the CPUs of the master station and slave stations hold the other operations and must execute only the operations of time synchronization.
Moreover, the prior art described previously also has provided a problem that a transmission delay time between the master station and slave stations must be measured previously and stored as the data in CPU and if the transmission route is changed, these operations must be carried out again.
In addition, there has been a problem that the system which always periodically executes data transmission and transmission of time synchronization signal on a real time basis requires temporary stop of data flow.